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CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies

CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies

Process-Aware SRAM Design and Test

by Andrei Pavlov and Manoj Sachdev
Paperback
Publication Date: 28/10/2010

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The monograph will be dedicated to SRAM (memory) design and test issues in nano-scaled technologies by adapting the cell design and chip design considerations to the growing process variations with associated test issues. Purpose: provide process-aware solutions for SRAM design and test challenges.
ISBN:
9789048178551
9789048178551
Category:
Circuits & components
Format:
Paperback
Publication Date:
28-10-2010
Language:
English
Publisher:
Springer
Country of origin:
Netherlands
Pages:
194
Dimensions (mm):
235x155x11mm
Weight:
0.45kg

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