List of Abbreviations and Symbols.

1 Introduction. 1.1 Transistor Scaling. 1.2 What's Next? (2010 - ...). 1.3 Goals of the Book. 1.4 Organization of the Book.

2 S/D Junctions in Ge: experimental. 2.1 Introduction. 2.2 P-type Junctions. 2.3 N-Type Junctions. 2.4 Benchmarking. 2.5 Summary and Conclusions.

3 TCAD Simulation and Modeling of Ion Implants in Germanium. 3.1 Introduction. 3.2 Ion Implant into Germanium - Monte Carlo Simulations. 3.3 Ion Implant into Germanium - Analytical Description. 3.4 Application to a 70 nm Bulk Ge pFET Technology. 3.5 Summary and Conclusions.

4 Electrical TCAD Simulations and Modeling in Germanium. 4.1 Introduction. 4.2 TCAD Models for a Germanium pMOSFET technology. 4.3 Electrical TCAD simulations - 65 nm Ge pMOSFET Technology. 4.4 Impact of Interface Traps MOS Performance. 4.5 Summary and Conclusions.

5 Investigation of Quantum Well Transistors for Scaled Technologies. 5.1 Introduction. 5.2 Motivation - Scalability Issues in Bulk MOSFET Technologies. 5.3 Towards A Scalable Transistor Architecture. 5.4 High Electron Mobility Transistors: an Alternative Approach. 5.5 Operation of Heterostructure Transistors: Analytical Description. 5.6 Conclusions.

6 Implant-Free Quantum Well FETs: Experimental investigation. 6.1 Introduction. 6.2 First-Generation SiGe Implant-Free Quantum Well pFET. 6.3 Enhancing Performance in SiGe IFQW pFETs. 6.4 Second-generation Strained SiGe IFQW pFETs. 6.5 Matching Performance and VT -Tuning in IFQW pFETs. 6.6 SiGe Quantum Well Diffusion Study. 6.7 Conclusions.

7 Conclusions Future Work and Outlook. 7.1 Conclusions. 7.2 Future Work and Outlook.

Bibliography. List of Publications.