This book covers layout design and layout migration methodologies for optimizing multi-net wire structures in advanced VLSI interconnects. Scaling-dependent models for interconnect power, interconnect delay and crosstalk noise are covered in depth, and several design optimization problems are addressed, such as minimization of interconnect power under delay constraints, or design for minimal delay in wire bundles within a given routing area. A handy reference or a guide for design methodologies and layout automation techniques, this book provides a foundation for physical design challenges of interconnect in advanced integrated circuits.
- ISBN:
- 9781461408208
- 9781461408208
-
Category:
- Circuits & components
- Format:
- Hardback
- Publication Date:
-
08-11-2014
- Language:
- English
- Publisher:
- Springer-Verlag New York Inc.
- Country of origin:
- United States
- Pages:
- 233
- Dimensions (mm):
- 235x155x16mm
- Weight:
- 5.49kg
This title is in stock with our Australian supplier and should arrive at our Sydney warehouse within 2 - 3 weeks of you placing an order.
Once received into our warehouse we will despatch it to you with a Shipping Notification which includes online tracking.
Please check the estimated delivery times below for your region, for after your order is despatched from our warehouse:
ACT Metro: 2 working days
NSW Metro: 2 working days
NSW Rural: 2-3 working days
NSW Remote: 2-5 working days
NT Metro: 3-6 working days
NT Remote: 4-10 working days
QLD Metro: 2-4 working days
QLD Rural: 2-5 working days
QLD Remote: 2-7 working days
SA Metro: 2-5 working days
SA Rural: 3-6 working days
SA Remote: 3-7 working days
TAS Metro: 3-6 working days
TAS Rural: 3-6 working days
VIC Metro: 2-3 working days
VIC Rural: 2-4 working days
VIC Remote: 2-5 working days
WA Metro: 3-6 working days
WA Rural: 4-8 working days
WA Remote: 4-12 working days
Share This Book: