This book explores near-threshold computing (NTC), a design-space using techniques to run digital chips (processors) near the lowest possible voltage. Readers will be enabled with specific techniques to design chips that are extremely robust; tolerating variability and resilient against errors. Variability-aware voltage and frequency allocation schemes will be presented that will provide performance guarantees, when moving toward near-threshold manycore chips. * Provides an introduction to near-threshold computing, enabling reader with a variety of tools to face the challenges of the power/utilization wall;

* Demonstrates how to design efficient voltage regulation, so that each region of the chip can operate at the most efficient voltage and frequency point;

* Investigates how performance guarantees can be ensured when moving towards NTC manycores through variability-aware voltage and frequency allocation schemes.