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On-Chip Training NPU

On-Chip Training NPU

Algorithm, Architecture and SoC Design

by Donghyeon Han and Hoi-Jun Yoo
Hardback
Publication Date: 28/07/2023

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Unlike most available sources that focus on deep neural network (DNN) inference, this book provides readers with a single-source reference on the needs, requirements, and challenges involved with on-device, DNN training semiconductor and SoC design. The authors include coverage of the trends and history surrounding the development of on-device DNN training, as well as on-device training semiconductors and SoC design examples to facilitate understanding.

ISBN:
9783031342363
9783031342363
Category:
Circuits & components
Format:
Hardback
Publication Date:
28-07-2023
Language:
English
Publisher:
Springer
Country of origin:
United States
Dimensions (mm):
235x155mm
Weight:
0.56kg

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